The Code has been broken !

The RISC-V is one of the most structured ISA I have come across so far , hence it was easy for me to design a structural module for the decoder. Like any other RISC instruction set, RISC-V also has a family of instructions with similar family-code and argument list. These instructions which belong to a particular family are distinguished by their own instruction opcodes.

Since the number of families in the ISA was not very large , I chose to segregate the instructions by their family first and then to decode the exact instruction by extracting its individual opcode.

This sounded all fine when I planned it. But the implementation was a bit difficult than I had thought. I had to come up with a data structure that can efficiently store multiple hierarchies of keys and values as the bitwise difference of different instructions was quite varied especially in the non logical and arithmetic instructions.

I decided to go with the multiple-key dictionary available directly in python. I made a hierarchy of keys , each differentiating one instruction from each other, First key being the family-code. Maximum number of keys that I had to use per instructions was 4, in very large families [0x14, 0x1C] etc.

Sample Decode Logic :

`addw rd rs1 rs2 31..25=0 14..12=0 6..2=0x0E 1..0=3`

My decoder will extract the 5 bit family-code from `6 to 2`, the 7 bit slice and the 3 bit slice from `31 to 27` and `14 to 12` respectively. Thus as you can probably guess, the order of the keys will be family-code-> 3-bit slice -> 7-bit slice. 

Thus when these keys are fed to the decoder table, it spits out the instruction name. Once we have the instruction name we can easily extract the arguments it takes from the 32 bit instruction.

I got a lot of help from the opcode repository from risc-v as it listed down the args, opcodes and instruction names in a very lucid readable manner.

Then came the testing part. I created the tests for each instruction and test method for each family. Thankfully they all passed :).

So I guess the code has indeed been broken. Now I have to move on with the remaining RISC-V implementation.

See you next week,

MS